x86/
segmentation.rs

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1//! Functionality to manipulate segment registers, build segement
2//! descriptors and selectors.
3use bitflags::*;
4
5use core::arch::asm;
6use core::fmt;
7
8use crate::Ring;
9
10bitflags! {
11    /// Specifies which element to load into a segment from
12    /// descriptor tables (i.e., is a index to LDT or GDT table
13    /// with some additional flags).
14    ///
15    /// See Intel 3a, Section 3.4.2 "Segment Selectors"
16    pub struct SegmentSelector: u16 {
17        /// Requestor Privilege Level
18        const RPL_0 = 0b00;
19        const RPL_1 = 0b01;
20        const RPL_2 = 0b10;
21        const RPL_3 = 0b11;
22
23        /// Table Indicator (TI) 0 means GDT is used.
24        const TI_GDT = 0 << 2;
25        /// Table Indicator (TI) 1 means LDT is used.
26        const TI_LDT = 1 << 2;
27    }
28}
29
30impl SegmentSelector {
31    /// Create a new SegmentSelector
32    ///
33    /// # Arguments
34    ///  * `index` - index in GDT or LDT array.
35    ///  * `rpl` - Requested privilege level of the selector
36    pub const fn new(index: u16, rpl: Ring) -> SegmentSelector {
37        SegmentSelector {
38            bits: index << 3 | (rpl as u16),
39        }
40    }
41
42    /// Returns segment selector's index in GDT or LDT.
43    pub fn index(&self) -> u16 {
44        self.bits >> 3
45    }
46
47    /// Make a new segment selector from a untyped u16 value.
48    pub const fn from_raw(bits: u16) -> SegmentSelector {
49        SegmentSelector { bits }
50    }
51}
52
53impl fmt::Display for SegmentSelector {
54    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
55        let r0 = match self.contains(SegmentSelector::RPL_0) {
56            false => "",
57            true => "Ring 0 segment selector.",
58        };
59        let r1 = match self.contains(SegmentSelector::RPL_1) {
60            false => "",
61            true => "Ring 1 segment selector.",
62        };
63        let r2 = match self.contains(SegmentSelector::RPL_2) {
64            false => "",
65            true => "Ring 2 segment selector.",
66        };
67        let r3 = match self.contains(SegmentSelector::RPL_3) {
68            false => "",
69            true => "Ring 3 segment selector.",
70        };
71        let tbl = match self.contains(SegmentSelector::TI_LDT) {
72            false => "GDT Table",
73            true => "LDT Table",
74        };
75
76        write!(
77            f,
78            "Index {} in {}, {}{}{}{}",
79            self.bits >> 3,
80            tbl,
81            r0,
82            r1,
83            r2,
84            r3
85        )
86    }
87}
88
89/// System-Segment and Gate-Descriptor Types 64-bit mode
90/// See also Intel 3a, Table 3-2 System Segment and Gate-Descriptor Types.
91#[allow(clippy::upper_case_acronyms)]
92#[repr(u8)]
93#[derive(Copy, Clone, Debug, Eq, PartialEq)]
94pub enum SystemDescriptorTypes64 {
95    //Reserved0 = 0b0000,
96    //Reserved1 = 0b0001,
97    LDT = 0b0010,
98    //Reserved = 0b0011,
99    //Reserved = 0b0100,
100    //Reserved = 0b0101,
101    //Reserved = 0b0110,
102    //Reserved = 0b0111,
103    //Reserved = 0b1000,
104    TssAvailable = 0b1001,
105    //Reserved = 0b1010,
106    TssBusy = 0b1011,
107    CallGate = 0b1100,
108    //Reserved = 0b1101,
109    InterruptGate = 0b1110,
110    TrapGate = 0b1111,
111}
112
113/// System-Segment and Gate-Descriptor Types 32-bit mode.
114/// See also Intel 3a, Table 3-2 System Segment and Gate-Descriptor Types.
115#[allow(clippy::upper_case_acronyms)]
116#[repr(u8)]
117#[derive(Copy, Clone, Debug, Eq, PartialEq)]
118pub enum SystemDescriptorTypes32 {
119    //Reserved0 = 0b0000,
120    TSSAvailable16 = 0b0001,
121    LDT = 0b0010,
122    TSSBusy16 = 0b0011,
123    CallGate16 = 0b0100,
124    TaskGate = 0b0101,
125    InterruptGate16 = 0b0110,
126    TrapGate16 = 0b0111,
127    //Reserved1 = 0b1000,
128    TssAvailable32 = 0b1001,
129    //Reserved2 = 0b1010,
130    TssBusy32 = 0b1011,
131    CallGate32 = 0b1100,
132    //Reserved3 = 0b1101,
133    InterruptGate32 = 0b1110,
134    TrapGate32 = 0b1111,
135}
136
137/// Data Segment types for descriptors.
138/// See also Intel 3a, Table 3-1 Code- and Data-Segment Types.
139#[repr(u8)]
140#[derive(Copy, Clone, Debug, Eq, PartialEq)]
141pub enum DataSegmentType {
142    /// Data Read-Only
143    ReadOnly = 0b0000,
144    /// Data Read-Only, accessed
145    ReadOnlyAccessed = 0b0001,
146    /// Data Read/Write
147    ReadWrite = 0b0010,
148    /// Data Read/Write, accessed
149    ReadWriteAccessed = 0b0011,
150    /// Data Read-Only, expand-down
151    ReadExpand = 0b0100,
152    /// Data Read-Only, expand-down, accessed
153    ReadExpandAccessed = 0b0101,
154    /// Data Read/Write, expand-down
155    ReadWriteExpand = 0b0110,
156    /// Data Read/Write, expand-down, accessed
157    ReadWriteExpandAccessed = 0b0111,
158}
159
160/// Code Segment types for descriptors.
161/// See also Intel 3a, Table 3-1 Code- and Data-Segment Types.
162#[repr(u8)]
163#[derive(Copy, Clone, Debug, Eq, PartialEq)]
164pub enum CodeSegmentType {
165    /// Code Execute-Only
166    Execute = 0b1000,
167    /// Code Execute-Only, accessed
168    ExecuteAccessed = 0b1001,
169    /// Code Execute/Read
170    ExecuteRead = 0b1010,
171    /// Code Execute/Read, accessed
172    ExecuteReadAccessed = 0b1011,
173    /// Code Execute-Only, conforming
174    ExecuteConforming = 0b1100,
175    /// Code Execute-Only, conforming, accessed
176    ExecuteConformingAccessed = 0b1101,
177    /// Code Execute/Read, conforming
178    ExecuteReadConforming = 0b1110,
179    /// Code Execute/Read, conforming, accessed
180    ExecuteReadConformingAccessed = 0b1111,
181}
182
183/// Helper enum type to differentiate between the different descriptor types that all end up written in the same field.
184#[derive(Debug, Eq, PartialEq)]
185pub(crate) enum DescriptorType {
186    System64(SystemDescriptorTypes64),
187    System32(SystemDescriptorTypes32),
188    Data(DataSegmentType),
189    Code(CodeSegmentType),
190}
191
192/// Trait that defines the architecture specific functions for building various system segment descriptors
193/// which are available on all 16, 32, and 64 bits.
194pub trait GateDescriptorBuilder<Size> {
195    fn tss_descriptor(base: u64, limit: u64, available: bool) -> Self;
196    fn call_gate_descriptor(selector: SegmentSelector, offset: Size) -> Self;
197    fn interrupt_descriptor(selector: SegmentSelector, offset: Size) -> Self;
198    fn trap_gate_descriptor(selector: SegmentSelector, offset: Size) -> Self;
199}
200
201/// Trait to implement for building a task-gate (this descriptor is not implemented for 64-bit systems since
202/// Hardware task switches are not supported in IA-32e mode.).
203pub trait TaskGateDescriptorBuilder {
204    fn task_gate_descriptor(selector: SegmentSelector) -> Self;
205}
206
207/// Trait to define functions that build architecture specific code and data descriptors.
208pub trait SegmentDescriptorBuilder<Size> {
209    fn code_descriptor(base: Size, limit: Size, cst: CodeSegmentType) -> Self;
210    fn data_descriptor(base: Size, limit: Size, dst: DataSegmentType) -> Self;
211}
212
213/// Trait to define functions that build an architecture specific ldt descriptor.
214/// There is no corresponding ldt descriptor type for 16 bit.
215pub trait LdtDescriptorBuilder<Size> {
216    fn ldt_descriptor(base: Size, limit: Size) -> Self;
217}
218
219pub trait BuildDescriptor<Descriptor> {
220    fn finish(&self) -> Descriptor;
221}
222
223/// Makes building descriptors easier (hopefully).
224#[derive(Debug)]
225pub struct DescriptorBuilder {
226    /// The base defines the location of byte 0 of the segment within the 4-GByte linear address space.
227    /// The limit is the size of the range covered by the segment. Really a 20bit value.
228    pub(crate) base_limit: Option<(u64, u64)>,
229    /// Alternative to base_limit we use a selector that points to a segment and an an offset for certain descriptors.
230    pub(crate) selector_offset: Option<(SegmentSelector, u64)>,
231    /// Descriptor type
232    pub(crate) typ: Option<DescriptorType>,
233    /// Specifies the privilege level of the segment. The privilege level can range from 0 to 3, with 0 being the most privileged level.
234    pub(crate) dpl: Option<Ring>,
235    /// Indicates whether the segment is present in memory (set) or not present (clear).
236    pub(crate) present: bool,
237    /// Available for use by system software
238    pub(crate) avl: bool,
239    /// Default operation size
240    pub(crate) db: bool,
241    /// Determines the scaling of the segment limit field. When the granularity flag is clear, the segment limit is interpreted in byte units; when flag is set, the segment limit is interpreted in 4-KByte units.
242    pub(crate) limit_granularity_4k: bool,
243    /// 64-bit code segment (IA-32e mode only)
244    pub(crate) l: bool,
245    /// Interrupt stack table (IST) selector (IA-32e mode only)
246    pub(crate) ist: u8,
247}
248
249impl DescriptorBuilder {
250    /// Start building a new descriptor with a base and limit.
251    pub(crate) fn with_base_limit(base: u64, limit: u64) -> DescriptorBuilder {
252        DescriptorBuilder {
253            base_limit: Some((base, limit)),
254            selector_offset: None,
255            typ: None,
256            dpl: None,
257            present: false,
258            avl: false,
259            db: false,
260            limit_granularity_4k: false,
261            l: false,
262            ist: 0,
263        }
264    }
265
266    /// Start building a new descriptor with a segment selector and offset.
267    pub(crate) fn with_selector_offset(
268        selector: SegmentSelector,
269        offset: u64,
270    ) -> DescriptorBuilder {
271        DescriptorBuilder {
272            base_limit: None,
273            selector_offset: Some((selector, offset)),
274            typ: None,
275            dpl: None,
276            present: false,
277            avl: false,
278            db: false,
279            limit_granularity_4k: false,
280            l: false,
281            ist: 0,
282        }
283    }
284
285    pub(crate) fn set_type(mut self, typ: DescriptorType) -> DescriptorBuilder {
286        self.typ = Some(typ);
287        self
288    }
289
290    /// The segment limit is interpreted in 4-KByte units if this is set.
291    pub fn limit_granularity_4kb(mut self) -> DescriptorBuilder {
292        self.limit_granularity_4k = true;
293        self
294    }
295
296    /// Indicates whether the segment is present in memory (set) or not present (clear).
297    pub fn present(mut self) -> DescriptorBuilder {
298        self.present = true;
299        self
300    }
301
302    /// Specifies the privilege level of the segment.
303    pub fn dpl(mut self, dpl: Ring) -> DescriptorBuilder {
304        self.dpl = Some(dpl);
305        self
306    }
307
308    /// Toggle the AVL bit.
309    pub fn avl(mut self) -> DescriptorBuilder {
310        self.avl = true;
311        self
312    }
313
314    /// Set default operation size (false for 16bit segment, true for 32bit segments).
315    pub fn db(mut self) -> DescriptorBuilder {
316        self.db = true;
317        self
318    }
319
320    /// Set L bit if this descriptor is a 64-bit code segment.
321    /// In IA-32e mode, bit 21 of the second doubleword of the segment descriptor indicates whether a code segment
322    /// contains native 64-bit code. A value of 1 indicates instructions in this code segment are executed in 64-bit mode.
323    pub fn l(mut self) -> DescriptorBuilder {
324        self.l = true;
325        self
326    }
327
328    /// Set a the interrupt stack table index (only if this ends up being a 64-bit interrupt descriptor).
329    pub fn ist(mut self, index: u8) -> DescriptorBuilder {
330        debug_assert!(index <= 7);
331        self.ist = index;
332        self
333    }
334}
335
336impl GateDescriptorBuilder<u32> for DescriptorBuilder {
337    fn tss_descriptor(base: u64, limit: u64, available: bool) -> DescriptorBuilder {
338        let typ = match available {
339            true => DescriptorType::System32(SystemDescriptorTypes32::TssAvailable32),
340            false => DescriptorType::System32(SystemDescriptorTypes32::TssBusy32),
341        };
342
343        DescriptorBuilder::with_base_limit(base, limit).set_type(typ)
344    }
345
346    fn call_gate_descriptor(selector: SegmentSelector, offset: u32) -> DescriptorBuilder {
347        DescriptorBuilder::with_selector_offset(selector, offset.into()).set_type(
348            DescriptorType::System32(SystemDescriptorTypes32::CallGate32),
349        )
350    }
351
352    fn interrupt_descriptor(selector: SegmentSelector, offset: u32) -> DescriptorBuilder {
353        DescriptorBuilder::with_selector_offset(selector, offset.into()).set_type(
354            DescriptorType::System32(SystemDescriptorTypes32::InterruptGate32),
355        )
356    }
357
358    fn trap_gate_descriptor(selector: SegmentSelector, offset: u32) -> DescriptorBuilder {
359        DescriptorBuilder::with_selector_offset(selector, offset.into()).set_type(
360            DescriptorType::System32(SystemDescriptorTypes32::TrapGate32),
361        )
362    }
363}
364
365impl TaskGateDescriptorBuilder for DescriptorBuilder {
366    fn task_gate_descriptor(selector: SegmentSelector) -> DescriptorBuilder {
367        DescriptorBuilder::with_selector_offset(selector, 0)
368            .set_type(DescriptorType::System32(SystemDescriptorTypes32::TaskGate))
369    }
370}
371
372impl SegmentDescriptorBuilder<u32> for DescriptorBuilder {
373    fn code_descriptor(base: u32, limit: u32, cst: CodeSegmentType) -> DescriptorBuilder {
374        DescriptorBuilder::with_base_limit(base.into(), limit.into())
375            .set_type(DescriptorType::Code(cst))
376    }
377
378    fn data_descriptor(base: u32, limit: u32, dst: DataSegmentType) -> DescriptorBuilder {
379        DescriptorBuilder::with_base_limit(base.into(), limit.into())
380            .set_type(DescriptorType::Data(dst))
381    }
382}
383
384impl LdtDescriptorBuilder<u32> for DescriptorBuilder {
385    fn ldt_descriptor(base: u32, limit: u32) -> DescriptorBuilder {
386        DescriptorBuilder::with_base_limit(base.into(), limit.into())
387            .set_type(DescriptorType::System32(SystemDescriptorTypes32::LDT))
388    }
389}
390
391impl BuildDescriptor<Descriptor> for DescriptorBuilder {
392    fn finish(&self) -> Descriptor {
393        let mut desc: Descriptor = Default::default();
394        desc.apply_builder_settings(self);
395
396        let typ = match self.typ {
397            Some(DescriptorType::System64(_)) => {
398                panic!("You shall not use 64-bit types on 32-bit descriptor.")
399            }
400            Some(DescriptorType::System32(typ)) => typ as u8,
401            Some(DescriptorType::Data(typ)) => {
402                desc.set_s();
403                typ as u8
404            }
405            Some(DescriptorType::Code(typ)) => {
406                desc.set_s();
407                typ as u8
408            }
409            None => unreachable!("Type not set, this is a library bug in x86."),
410        };
411        desc.set_type(typ);
412
413        desc
414    }
415}
416
417/// Entry for IDT, GDT or LDT. Provides size and location of a segment.
418///
419/// See Intel 3a, Section 3.4.5 "Segment Descriptors", and Section 3.5.2
420#[derive(Copy, Clone, Debug, Default)]
421#[repr(packed)]
422pub struct Descriptor {
423    pub lower: u32,
424    pub upper: u32,
425}
426
427impl fmt::Display for Descriptor {
428    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
429        write!(f, "Descriptor(0x{:x})", self.as_u64())
430    }
431}
432
433impl Descriptor {
434    pub const NULL: Descriptor = Descriptor { lower: 0, upper: 0 };
435
436    pub fn as_u64(&self) -> u64 {
437        (self.upper as u64) << 32 | self.lower as u64
438    }
439
440    pub(crate) fn apply_builder_settings(&mut self, builder: &DescriptorBuilder) {
441        if let Some(ring) = builder.dpl {
442            self.set_dpl(ring)
443        }
444        if let Some((base, limit)) = builder.base_limit {
445            self.set_base_limit(base as u32, limit as u32)
446        }
447        if let Some((selector, offset)) = builder.selector_offset {
448            self.set_selector_offset(selector, offset as u32)
449        }
450
451        if builder.present {
452            self.set_p();
453        }
454        if builder.avl {
455            self.set_avl();
456        }
457        if builder.db {
458            self.set_db();
459        }
460        if builder.limit_granularity_4k {
461            self.set_g();
462        }
463        if builder.l {
464            self.set_l();
465        }
466    }
467
468    /// Create a new segment, TSS or LDT descriptor
469    /// by setting the three base and two limit fields.
470    pub fn set_base_limit(&mut self, base: u32, limit: u32) {
471        // Clear the base and limit fields in Descriptor
472        self.lower = 0;
473        self.upper &= 0x00F0FF00;
474
475        // Set the new base
476        self.lower |= base << 16;
477        self.upper |= (base >> 16) & 0xff;
478        self.upper |= (base >> 24) << 24;
479
480        // Set the new limit
481        self.lower |= limit & 0xffff;
482        let limit_last_four_bits = (limit >> 16) & 0x0f;
483        self.upper |= limit_last_four_bits << 16;
484    }
485
486    /// Creates a new descriptor with selector and offset (for IDT Gate descriptors,
487    /// e.g. Trap, Interrupts and Task gates)
488    pub fn set_selector_offset(&mut self, selector: SegmentSelector, offset: u32) {
489        // Clear the selector and offset
490        self.lower = 0;
491        self.upper &= 0x0000ffff;
492
493        // Set selector
494        self.lower |= (selector.bits() as u32) << 16;
495
496        // Set offset
497        self.lower |= offset & 0x0000ffff;
498        self.upper |= offset & 0xffff0000;
499    }
500
501    /// Set the type of the descriptor (bits 8-11).
502    /// Indicates the segment or gate type and specifies the kinds of access that can be made to the
503    /// segment and the direction of growth. The interpretation of this field depends on whether the descriptor
504    /// type flag specifies an application (code or data) descriptor or a system descriptor.
505    pub fn set_type(&mut self, typ: u8) {
506        self.upper &= !(0x0f << 8); // clear
507        self.upper |= (typ as u32 & 0x0f) << 8;
508    }
509
510    /// Specifies whether the segment descriptor is for a system segment (S flag is clear) or a code or data segment (S flag is set).
511    pub fn set_s(&mut self) {
512        self.upper |= bit!(12);
513    }
514
515    /// Specifies the privilege level of the segment. The DPL is used to control access to the segment.
516    pub fn set_dpl(&mut self, ring: Ring) {
517        assert!(ring as u32 <= 0b11);
518        self.upper &= !(0b11 << 13);
519        self.upper |= (ring as u32) << 13;
520    }
521
522    /// Set Present bit.
523    /// Indicates whether the segment is present in memory (set) or not present (clear).
524    /// If this flag is clear, the processor generates a segment-not-present exception (#NP) when a segment selector
525    /// that points to the segment descriptor is loaded into a segment register.
526    pub fn set_p(&mut self) {
527        self.upper |= bit!(15);
528    }
529
530    /// Set AVL bit. System software can use this bit to store information.
531    pub fn set_avl(&mut self) {
532        self.upper |= bit!(20);
533    }
534
535    /// Set L
536    /// In IA-32e mode, bit 21 of the second doubleword of the segment descriptor indicates whether a
537    /// code segment contains native 64-bit code. A value of 1 indicates instructions in this code
538    /// segment are executed in 64-bit mode. A value of 0 indicates the instructions in this code segment
539    /// are executed in compatibility mode. If L-bit is set, then D-bit must be cleared.
540    pub fn set_l(&mut self) {
541        self.upper |= bit!(21);
542    }
543
544    /// Set D/B.
545    /// Performs different functions depending on whether the segment descriptor is an executable code segment,
546    /// an expand-down data segment, or a stack segment.
547    pub fn set_db(&mut self) {
548        self.upper |= bit!(22);
549    }
550
551    /// Set G bit
552    /// Determines the scaling of the segment limit field.
553    /// When the granularity flag is clear, the segment limit is interpreted in byte units;
554    /// when flag is set, the segment limit is interpreted in 4-KByte units.
555    pub fn set_g(&mut self) {
556        self.upper |= bit!(23);
557    }
558}
559
560/// Reload stack segment register.
561///
562/// # Safety
563/// Needs CPL 0.
564pub unsafe fn load_ss(sel: SegmentSelector) {
565    asm!("movw {0:x}, %ss", in(reg) sel.bits(), options(att_syntax));
566}
567
568/// Reload data segment register.
569///
570/// # Safety
571/// Needs CPL 0.
572pub unsafe fn load_ds(sel: SegmentSelector) {
573    asm!("movw {0:x}, %ds", in(reg) sel.bits(), options(att_syntax));
574}
575
576/// Reload es segment register.
577///
578/// # Safety
579/// Needs CPL 0.
580pub unsafe fn load_es(sel: SegmentSelector) {
581    asm!("movw {0:x}, %es", in(reg) sel.bits(), options(att_syntax));
582}
583
584/// Reload fs segment register.
585///
586/// # Safety
587/// Needs CPL 0.
588pub unsafe fn load_fs(sel: SegmentSelector) {
589    asm!("movw {0:x}, %fs", in(reg) sel.bits(), options(att_syntax));
590}
591
592/// Reload gs segment register.
593///
594/// # Safety
595/// Needs CPL 0.
596pub unsafe fn load_gs(sel: SegmentSelector) {
597    asm!("movw {0:x}, %gs", in(reg) sel.bits(), options(att_syntax));
598}
599
600pub use crate::current::segmentation::load_cs;
601
602/// Returns the current value of the code segment register.
603pub fn cs() -> SegmentSelector {
604    let segment: u16;
605    unsafe { asm!("mov %cs, {0:x}", out(reg) segment, options(att_syntax)) };
606    SegmentSelector::from_raw(segment)
607}
608
609/// Returns the current value of the extra segment register.
610pub fn es() -> SegmentSelector {
611    let segment: u16;
612    unsafe { asm!("mov %es, {0:x}", out(reg) segment, options(att_syntax)) };
613    SegmentSelector::from_raw(segment)
614}
615
616/// Returns the current value of the stack segment register.
617pub fn ss() -> SegmentSelector {
618    let segment: u16;
619    unsafe { asm!("mov %ss, {0:x}", out(reg) segment, options(att_syntax)) };
620    SegmentSelector::from_raw(segment)
621}
622
623/// Returns the current value of the data segment register.
624pub fn ds() -> SegmentSelector {
625    let segment: u16;
626    unsafe { asm!("mov %ds, {0:x}", out(reg) segment, options(att_syntax)) };
627    SegmentSelector::from_raw(segment)
628}
629
630/// Returns the current value of the FS segment register.
631pub fn fs() -> SegmentSelector {
632    let segment: u16;
633    unsafe { asm!("mov %fs, {0:x}", out(reg) segment, options(att_syntax)) };
634    SegmentSelector::from_raw(segment)
635}
636
637/// Returns the current value of the GS segment register.
638pub fn gs() -> SegmentSelector {
639    let segment: u16;
640    unsafe { asm!("mov %gs, {0:x}", out(reg) segment, options(att_syntax)) };
641    SegmentSelector::from_raw(segment)
642}
643
644#[cfg(all(test, feature = "utest"))]
645mod test {
646    use super::*;
647    use crate::Ring;
648
649    #[test]
650    fn test_x86_64_default_gdt() {
651        let null: Descriptor = Default::default();
652        let code_kernel: Descriptor =
653            DescriptorBuilder::code_descriptor(0, 0xFFFFF, CodeSegmentType::ExecuteRead)
654                .present()
655                .dpl(Ring::Ring0)
656                .limit_granularity_4kb()
657                .db()
658                .finish();
659        let stack_kernel: Descriptor =
660            DescriptorBuilder::data_descriptor(0, 0xFFFFF, DataSegmentType::ReadWrite)
661                .present()
662                .dpl(Ring::Ring0)
663                .limit_granularity_4kb()
664                .db()
665                .finish();
666        let code_user: Descriptor =
667            DescriptorBuilder::code_descriptor(0, 0xFFFFF, CodeSegmentType::ExecuteRead)
668                .present()
669                .limit_granularity_4kb()
670                .db()
671                .dpl(Ring::Ring3)
672                .finish();
673        let stack_user: Descriptor =
674            DescriptorBuilder::data_descriptor(0, 0xFFFFF, DataSegmentType::ReadWrite)
675                .present()
676                .limit_granularity_4kb()
677                .db()
678                .dpl(Ring::Ring3)
679                .finish();
680
681        assert_eq!(0x0000000000000000u64, null.as_u64());
682        assert_eq!(
683            0x00CF9A000000FFFFu64,
684            code_kernel.as_u64(),
685            "code_kernel: {:#b} first bit to differ is {}",
686            (code_kernel.as_u64() ^ 0x00CF9A000000FFFFu64),
687            (code_kernel.as_u64() ^ 0x00CF9A000000FFFFu64).trailing_zeros()
688        );
689        assert_eq!(
690            0x00CF92000000FFFFu64,
691            stack_kernel.as_u64(),
692            "stack_kernel: {:#b} first bit to differ is {}",
693            (stack_kernel.as_u64() ^ 0x00CF92000000FFFFu64),
694            (stack_kernel.as_u64() ^ 0x00CF92000000FFFFu64).trailing_zeros()
695        );
696        assert_eq!(
697            0x00CFFA000000FFFFu64,
698            code_user.as_u64(),
699            "code_user: {:#b} first bit to differ is {}",
700            (code_user.as_u64() ^ 0x00CFFA000000FFFFu64),
701            (code_user.as_u64() ^ 0x00CFFA000000FFFFu64).trailing_zeros()
702        );
703        assert_eq!(
704            0x00CFF2000000FFFFu64,
705            stack_user.as_u64(),
706            "stack_user: {:#b} first bit to differ is {}",
707            (stack_user.as_u64() ^ 0x00CFF2000000FFFFu64),
708            (stack_user.as_u64() ^ 0x00CFF2000000FFFFu64).trailing_zeros()
709        );
710    }
711}
x86/segmentation.rs

x86/
segmentation.rs
