Struct ExtendedCpuTopologyLevel 

pub struct ExtendedCpuTopologyLevel { /* private fields */ }

Gives information about the current level in the cpu topology.

Implementations

impl ExtendedCpuTopologyLevel

pub fn mask_width(&self) -> u8

Number of bits to shift Extended APIC ID right to get a unique topology ID of the current hierarchy level.

pub fn has_efficiency_ranking_available(&self) -> bool

Set to 1 if processor power efficiency ranking (PwrEfficiencyRanking) is available and varies between cores. Only valid for LevelType = 1h (Core).

pub fn has_heterogeneous_cores(&self) -> bool

Set to 1 if all components at the current hierarchy level do not consist of the cores that report the same core type (CoreType).

pub fn has_asymmetric_topology(&self) -> bool

Set to 1 if all components at the current hierarchy level do not report the same number of logical processors (NumLogProc).

pub fn num_logical_processors(&self) -> u16

Number of logical processors at the current hierarchy level

pub fn pwr_efficiency_ranking(&self) -> u8

Reports a static efficiency ranking between cores of a specific core type, where a lower value indicates comparatively lower power consumption and lower performance. Only valid for LevelType = 1h (Core)

pub fn native_mode_id(&self) -> u8

Reports a value that may be used to further differentiate implementation specific features. Native mode ID is used in conjunction with the family, model, and stepping identifiers. Refer to the Processor Programming Reference Manual applicable to your product for a list of Native Mode IDs. Only valid for LevelType = 1h (Core)

pub fn core_type(&self) -> u8

Reports a value that may be used to distinguish between cores with different architectural and microarchitectural properties (for example, cores with different performance or power characteristics). Refer to the Processor Programming Reference Manual applicable to your product for a list of the available core types. Only valid for LevelType = 1h (Core)

pub fn input_ecx(&self) -> u8

Input ECX

pub fn level_type(&self) -> HierarchyLevelType

Encoded hierarchy level type

pub fn extended_apic_id(&self) -> u32

Extended APIC ID of the logical processor

Trait Implementations

impl Debug for ExtendedCpuTopologyLevel

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for ExtendedCpuTopologyLevel

fn eq(&self, other: &ExtendedCpuTopologyLevel) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Eq for ExtendedCpuTopologyLevel

impl StructuralPartialEq for ExtendedCpuTopologyLevel