Enum DeliveryMode

#[repr(u64)]
pub enum DeliveryMode {
    Fixed = 0,
    LowestPriority = 1,
    SMI = 2,
    _Reserved = 3,
    NMI = 4,
    Init = 5,
    StartUp = 6,
}

Specify IPI Delivery Mode

Variants

Fixed = 0

Delivers the interrupt specified in the vector field to the target processor or processors.

LowestPriority = 1

Same as fixed mode, except that the interrupt is delivered to the processor executing at the lowest priority among the set of processors specified in the destination field. The ability for a processor to send a lowest priority IPI is model specific and should be avoided by BIOS and operating system software.

SMI = 2

Delivers an SMI interrupt to the target processor or processors. The vector field must be programmed to 00H for future compatibility.

_Reserved = 3

Reserved

NMI = 4

Delivers an NMI interrupt to the target processor or processors. The vector information is ignored.

Init = 5

Delivers an INIT request to the target processor or processors, which causes them to perform an INIT.

StartUp = 6

Sends a special start-up IPI (called a SIPI) to the target processor or processors. The vector typically points to a start-up routine that is part of the BIOS boot-strap code (see Section 8.4, Multiple-Processor (MP) Initialization). I PIs sent with this delivery mode are not automatically retried if the source APIC is unable to deliver it. It is up to the software to deter- mine if the SIPI was not successfully delivered and to reissue the SIPI if necessary.

Trait Implementations

impl Debug for DeliveryMode

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for DeliveryMode

fn eq(&self, other: &DeliveryMode) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Eq for DeliveryMode

impl StructuralPartialEq for DeliveryMode