Module control 

Functions to read and write control registers.

Re-exports

pub use super::model_specific::Efer;

pub use super::model_specific::EferFlags;

Structs

Cr0

Various control flags modifying the basic operation of the CPU.

Cr0Flags

Configuration flags of the Cr0 register.

Cr2

Contains the Page Fault Linear Address (PFLA).

Cr3

Contains the physical address of the highest-level page table.

Cr4

Contains various control flags that enable architectural extensions, and indicate support for specific processor capabilities.

Cr8

Contains the task priority.

Cr3Flags

Controls cache settings for the highest-level page table.

Cr4Flags

Configuration flags of the Cr4 register.

Enums

PriorityClass

A priority class for an interrupt. Loading CR8 with a priority class blocks all interrupts of that class or lower. Note that 0 is not a priority class, if CR8 contains 0, all interrupts are enabled regardless of their priority class.