Trait ApicControl 

pub trait ApicControl {
    // Required methods
    fn bsp(&self) -> bool;
    fn id(&self) -> u32;
    fn logical_id(&self) -> u32;
    fn version(&self) -> u32;
    fn eoi(&mut self);
    fn tsc_enable(&mut self, vector: u8);
    fn tsc_set(&self, value: u64);
    unsafe fn ipi_init(&mut self, core: ApicId);
    unsafe fn ipi_init_deassert(&mut self);
    unsafe fn ipi_startup(&mut self, core: ApicId, start_page: u8);
    unsafe fn send_ipi(&mut self, icr: Icr);
}

Abstracts common interface of local APIC (x2APIC, xAPIC) hardware devices.

Required Methods

fn bsp(&self) -> bool

Is a bootstrap processor?

fn id(&self) -> u32

Return APIC ID.

fn logical_id(&self) -> u32

Returns the logical APIC ID.

fn version(&self) -> u32

Read APIC version

fn eoi(&mut self)

End Of Interrupt – Acknowledge interrupt delivery.

fn tsc_enable(&mut self, vector: u8)

Enable TSC deadline timer.

fn tsc_set(&self, value: u64)

Set TSC deadline value.

unsafe fn ipi_init(&mut self, core: ApicId)

Send a INIT IPI to a core.

Safety

Should only be used to reset or boot a new core.

unsafe fn ipi_init_deassert(&mut self)

Deassert INIT IPI.

Safety

Should only be used to reset or boot a new core.

unsafe fn ipi_startup(&mut self, core: ApicId, start_page: u8)

Send a STARTUP IPI to a core.

Safety

Should only be used to reset or boot a new core.

unsafe fn send_ipi(&mut self, icr: Icr)

Send a generic IPI.

Safety

Interrupts one or multiple cores.

Implementors

impl ApicControl for X2APIC

Abstracts common interface of APIC (x2APIC, xAPIC) hardware devices.

impl ApicControl for XAPIC